5.9
CVE-2019-11090
- EPSS 0.63%
- Published 18.12.2019 22:15:12
- Last modified 21.11.2024 04:20:31
- Source secure@intel.com
- Teams watchlist Login
- Open Login
Cryptographic timing conditions in the subsystem for Intel(R) PTT before versions 11.8.70, 11.11.70, 11.22.70, 12.0.45, 13.0.0 and 14.0.10; Intel(R) TXE 3.1.70 and 4.0.20; Intel(R) SPS before versions SPS_E5_04.01.04.305.0, SPS_SoC-X_04.00.04.108.0, SPS_SoC-A_04.00.04.191.0, SPS_E3_04.01.04.086.0, SPS_E3_04.08.04.047.0 may allow an unauthenticated user to potentially enable information disclosure via network access.
Data is provided by the National Vulnerability Database (NVD)
Intel ≫ Platform Trust Technology Firmware Version >= 11.0 <= 11.8.70
Intel ≫ Platform Trust Technology Firmware Version >= 11.10 < 11.11.70
Intel ≫ Platform Trust Technology Firmware Version >= 11.20 < 11.22.70
Intel ≫ Platform Trust Technology Firmware Version >= 12.0 < 12.0.45
Intel ≫ Platform Trust Technology Firmware Version >= 13.0 < 13.0.0
Intel ≫ Platform Trust Technology Firmware Version >= 14.0.0 < 14.0.10
Intel ≫ Server Platform Services Firmware Version >= sps_e3_04.01.00.000.0 < sps_e3_04.01.04.086.0
Intel ≫ Server Platform Services Firmware Version >= sps_e5_04.00.00.000.0 < sps_e5_04.01.04.305.0
Intel ≫ Server Platform Services Firmware Version >= sps_soc-a_04.00.00.000.0 < sps_soc-a_04.00.04.191.0
Intel ≫ Server Platform Services Firmware Version >= sps_soc-x_04.00.00.000.0 < sps_soc-x_04.00.04.108.0
Intel ≫ Trusted Execution Engine Firmware Version >= 3.0 < 3.1.70
Intel ≫ Trusted Execution Engine Firmware Version >= 4.0 < 4.0.20
Zu dieser CVE wurde keine CISA KEV oder CERT.AT-Warnung gefunden.
Type | Source | Score | Percentile |
---|---|---|---|
EPSS | FIRST.org | 0.63% | 0.695 |
Source | Base Score | Exploit Score | Impact Score | Vector string |
---|---|---|---|---|
nvd@nist.gov | 5.9 | 2.2 | 3.6 |
CVSS:3.1/AV:N/AC:H/PR:N/UI:N/S:U/C:H/I:N/A:N
|
nvd@nist.gov | 4.3 | 8.6 | 2.9 |
AV:N/AC:M/Au:N/C:P/I:N/A:N
|
CWE-362 Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition')
The product contains a concurrent code sequence that requires temporary, exclusive access to a shared resource, but a timing window exists in which the shared resource can be modified by another code sequence operating concurrently.