Amd

Epyc 7702 Firmware

73 vulnerabilities found.

Hinweis: Diese Liste kann unvollständig sein. Daten werden ohne Gewähr im Ursprungsformat bereitgestellt.
  • EPSS 0.06%
  • Published 10.05.2022 19:15:08
  • Last modified 21.11.2024 05:56:19

Insufficient validation of elliptic curve points in SEV-legacy firmware may compromise SEV-legacy guest migration potentially resulting in loss of guest's integrity or confidentiality.

  • EPSS 0.13%
  • Published 10.05.2022 19:15:08
  • Last modified 21.11.2024 05:56:13

Improper validation of destination address in SVC_LOAD_FW_IMAGE_BY_INSTANCE and SVC_LOAD_BINARY_BY_ATTRIB in a malicious UApp or ABL may allow an attacker to overwrite arbitrary bootloader memory with SPI ROM contents resulting in a loss of integrity...

  • EPSS 0.13%
  • Published 11.03.2022 18:15:11
  • Last modified 21.11.2024 05:56:18

LFENCE/JMP (mitigation V2-2) may not sufficiently mitigate CVE-2017-5715 on some AMD CPUs.

  • EPSS 0.08%
  • Published 11.03.2022 18:15:10
  • Last modified 21.11.2024 05:56:09

Some AMD CPUs may transiently execute beyond unconditional direct branches, which may potentially result in data leakage.

  • EPSS 0.11%
  • Published 04.02.2022 23:15:10
  • Last modified 21.11.2024 05:00:36

AMD EPYC™ Processors contain an information disclosure vulnerability in the Secure Encrypted Virtualization with Encrypted State (SEV-ES) and Secure Encrypted Virtualization with Secure Nested Paging (SEV-SNP). A local authenticated attacker could po...

  • EPSS 0.06%
  • Published 10.12.2021 22:15:08
  • Last modified 21.11.2024 05:56:08

A malicious hypervisor in conjunction with an unprivileged attacker process inside an SEV/SEV-ES guest VM may fail to flush the Translation Lookaside Buffer (TLB) resulting in unexpected behavior inside the virtual machine (VM).

  • EPSS 0.13%
  • Published 16.11.2021 19:15:08
  • Last modified 21.11.2024 05:56:08

Insufficient DRAM address validation in System Management Unit (SMU) may result in a DMA read from invalid DRAM address to SRAM resulting in SMU not servicing further requests.

  • EPSS 0.13%
  • Published 16.11.2021 19:15:08
  • Last modified 21.11.2024 05:56:08

Insufficient bounds checking in System Management Unit (SMU) may cause invalid memory accesses/updates that could result in SMU hang and subsequent failure to service any further requests from other components.

  • EPSS 0.13%
  • Published 16.11.2021 19:15:08
  • Last modified 21.11.2024 05:56:07

Improper input and range checking in the AMD Secure Processor (ASP) boot loader image header may allow an attacker to use attacker-controlled values prior to signature validation potentially resulting in arbitrary code execution.

  • EPSS 0.05%
  • Published 16.11.2021 19:15:08
  • Last modified 21.11.2024 05:56:07

AMD System Management Unit (SMU) contains a potential issue where a malicious user may be able to manipulate mailbox entries leading to arbitrary code execution.