CVE-2019-0151
- EPSS 0.15%
- Veröffentlicht 14.11.2019 20:15:11
- Zuletzt bearbeitet 21.11.2024 04:16:20
Insufficient memory protection in Intel(R) TXT for certain Intel(R) Core Processors and Intel(R) Xeon(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.
CVE-2019-11136
- EPSS 0.14%
- Veröffentlicht 14.11.2019 17:15:13
- Zuletzt bearbeitet 21.11.2024 04:20:35
Insufficient access control in system firmware for Intel(R) Xeon(R) Scalable Processors, 2nd Generation Intel(R) Xeon(R) Scalable Processors and Intel(R) Xeon(R) Processors D Family may allow a privileged user to potentially enable escalation of priv...
CVE-2019-11137
- EPSS 0.14%
- Veröffentlicht 14.11.2019 17:15:13
- Zuletzt bearbeitet 21.11.2024 04:20:36
Insufficient input validation in system firmware for Intel(R) Xeon(R) Scalable Processors, Intel(R) Xeon(R) Processors D Family, Intel(R) Xeon(R) Processors E5 v4 Family, Intel(R) Xeon(R) Processors E7 v4 Family and Intel(R) Atom(R) processor C Serie...
CVE-2019-11184
- EPSS 0.2%
- Veröffentlicht 16.09.2019 16:15:10
- Zuletzt bearbeitet 21.11.2024 04:20:41
A race condition in specific microprocessors using Intel (R) DDIO cache allocation and RDMA may allow an authenticated user to potentially enable partial information disclosure via adjacent access.