Intel

Celeron J1750 Firmware

13 vulnerabilities found.

Hinweis: Diese Liste kann unvollständig sein. Daten werden ohne Gewähr im Ursprungsformat bereitgestellt.
  • EPSS 0.06%
  • Published 14.11.2023 19:15:19
  • Last modified 21.11.2024 07:50:05

Out-of-bounds read in the BIOS firmware for some Intel(R) Processors may allow an authenticated user to potentially enable escalation of privilege via adjacent access.

  • EPSS 0.04%
  • Published 14.11.2023 19:15:17
  • Last modified 21.11.2024 07:44:32

Improper input validation in the BIOS firmware for some Intel(R) Processors may allow an authenticated user to potentially enable denial of service via adjacent access.

  • EPSS 0.01%
  • Published 11.08.2023 03:15:15
  • Last modified 21.11.2024 07:26:36

Insufficient control flow management in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable denial of service via local access.

  • EPSS 0.03%
  • Published 11.08.2023 03:15:12
  • Last modified 21.11.2024 06:56:23

Improper buffer restrictions in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable information disclosure via local access.

  • EPSS 0.05%
  • Published 16.02.2023 21:15:13
  • Last modified 28.01.2025 16:15:34

Improper isolation of shared resources in some Intel(R) Processors when using Intel(R) Software Guard Extensions may allow a privileged user to potentially enable information disclosure via local access.

  • EPSS 0.05%
  • Published 16.02.2023 20:15:14
  • Last modified 21.11.2024 07:03:12

Improper initialization in the Intel(R) TXT SINIT ACM for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.

  • EPSS 0.04%
  • Published 11.11.2022 16:15:11
  • Last modified 04.02.2025 18:15:29

Time-of-check time-of-use race condition in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access.

  • EPSS 0.04%
  • Published 12.05.2022 17:15:09
  • Last modified 05.05.2025 17:17:40

Processor optimization removal or modification of security-critical code for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access.

  • EPSS 0.21%
  • Published 17.11.2021 20:15:09
  • Last modified 21.11.2024 05:42:02

Hardware allows activation of test or debug logic at runtime for some Intel(R) processors which may allow an unauthenticated user to potentially enable escalation of privilege via physical access.

  • EPSS 0.06%
  • Published 17.11.2021 20:15:09
  • Last modified 21.11.2024 05:42:09

Improper input validation in the Intel(R) SGX SDK applications compiled for SGX2 enabled processors may allow a privileged user to potentially escalation of privilege via local access.