4.6
CVE-2019-17391
- EPSS 0.16%
- Veröffentlicht 14.11.2019 21:15:12
- Zuletzt bearbeitet 21.11.2024 04:32:14
- Quelle cve@mitre.org
- CVE-Watchlists
- Unerledigt
An issue was discovered in the Espressif ESP32 mask ROM code 2016-06-08 0 through 2. Lack of anti-glitch mitigations in the first stage bootloader of the ESP32 chip allows an attacker (with physical access to the device) to read the contents of read-protected eFuses, such as flash encryption and secure boot keys, by injecting a glitch into the power supply of the chip shortly after reset.
Daten sind bereitgestellt durch National Vulnerability Database (NVD)
Espressif ≫ Esp32-d0wd Firmware Version-
Espressif ≫ Esp32-d2wd Firmware Version-
Espressif ≫ Esp32-s0wd Firmware Version-
Espressif ≫ Esp32-pico-d4 Firmware Version-
| Typ | Quelle | Score | Percentile |
|---|---|---|---|
| EPSS | FIRST.org | 0.16% | 0.366 |
| Quelle | Base Score | Exploit Score | Impact Score | Vector String |
|---|---|---|---|---|
| nvd@nist.gov | 4.6 | 0.9 | 3.6 |
CVSS:3.1/AV:P/AC:L/PR:N/UI:N/S:U/C:H/I:N/A:N
|
| nvd@nist.gov | 2.1 | 3.9 | 2.9 |
AV:L/AC:L/Au:N/C:P/I:N/A:N
|
CWE-755 Improper Handling of Exceptional Conditions
The product does not handle or incorrectly handles an exceptional condition.