6.4
CVE-2018-3615
- EPSS 1.18%
- Published 14.08.2018 19:29:00
- Last modified 21.11.2024 04:05:46
- Source secure@intel.com
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Systems with microprocessors utilizing speculative execution and Intel software guard extensions (Intel SGX) may allow unauthorized disclosure of information residing in the L1 data cache from an enclave to an attacker with local user access via a side-channel analysis.
Data is provided by the National Vulnerability Database (NVD)
Intel ≫ Xeon E3 1220 V5 Version-
Intel ≫ Xeon E3 1225 V5 Version-
Intel ≫ Xeon E3 1230 V5 Version-
Intel ≫ Xeon E3 1235l V5 Version-
Intel ≫ Xeon E3 1240 V5 Version-
Intel ≫ Xeon E3 1240l V5 Version-
Intel ≫ Xeon E3 1245 V5 Version-
Intel ≫ Xeon E3 1260l V5 Version-
Intel ≫ Xeon E3 1268l V5 Version-
Intel ≫ Xeon E3 1270 V5 Version-
Intel ≫ Xeon E3 1275 V5 Version-
Intel ≫ Xeon E3 1280 V5 Version-
Intel ≫ Xeon E3 1505l V5 Version-
Intel ≫ Xeon E3 1505m V5 Version-
Intel ≫ Xeon E3 1220 V6 Version-
Intel ≫ Xeon E3 1225 V6 Version-
Intel ≫ Xeon E3 1230 V6 Version-
Intel ≫ Xeon E3 1240 V6 Version-
Intel ≫ Xeon E3 1245 V6 Version-
Intel ≫ Xeon E3 1270 V6 Version-
Intel ≫ Xeon E3 1275 V6 Version-
Intel ≫ Xeon E3 1280 V6 Version-
Intel ≫ Xeon E3 1285 V6 Version-
Intel ≫ Xeon E3 1501l V6 Version-
Intel ≫ Xeon E3 1501m V6 Version-
Intel ≫ Xeon E3 1505l V6 Version-
Zu dieser CVE wurde keine CISA KEV oder CERT.AT-Warnung gefunden.
| Type | Source | Score | Percentile |
|---|---|---|---|
| EPSS | FIRST.org | 1.18% | 0.778 |
| Source | Base Score | Exploit Score | Impact Score | Vector string |
|---|---|---|---|---|
| nvd@nist.gov | 6.4 | 1.1 | 4.7 |
CVSS:3.0/AV:L/AC:H/PR:L/UI:N/S:C/C:H/I:L/A:N
|
| nvd@nist.gov | 5.4 | 3.4 | 7.8 |
AV:L/AC:M/Au:N/C:C/I:P/A:N
|
CWE-203 Observable Discrepancy
The product behaves differently or sends different responses under different circumstances in a way that is observable to an unauthorized actor, which exposes security-relevant information about the state of the product, such as whether a particular operation was successful or not.